1. Field of the Invention
This invention relates to a semiconductor device and its production method and more particularly, to a high mobility field effect transistor utilizing a two-dimensional electron gas or two-dimensional hole gas formed at a heterojunction interface thereof and its production method.
2. Description of the Prior Art
A conventional high mobility field effect transistor having a heterojunction interface is shown in FIG. 1, which is, excepting a gate electrode, disclosed in the Extended Abstracts of the 21st. Conference on Solid State Devices and Materials, Tokyo, 1989, pp. 373-376. In that abstracts, the gate electrode is not shown and as a result, the operation of the field effect transistor itself is not made clear. However, if a gate electrode 7 is disposed between ohmic electrodes 6 on a cap layer 5 as shown in FIG. 1, this transistor operates as a junction field effect transistor utilizing a two dimensional hole gas.
In FIG. 1, on a Ge substrate 1 of the (100)-direction, a SiGe layer 2 as a buffer layer, a Ge layer 3 as a channel layer, a Ga-doped Si.sub.0.5 Ge.sub.0.5 layer 4 and a cap layer 5 are formed in this order. On the cap layer 5, the two electrodes 6 are formed at spaces in an ohmic contact, which respectively become a source electrode and a drain electrode, and a gate electrode 7 is formed between the ohmic electrodes 6. The two dimensional hole gas is formed at the interface between the Ge layer 3 and Ga-doped Si.sub.0.5 Ge.sub.0.5 layer 4.
With the conventional field effect transistor as shown above, when to be produced, the source and drain electrodes and the gate electrode are required to be positioned using different masks in respective lithography processes. As a result, when the transistor is intended to be produced smaller in size, it is limited by the mask alignment accuracy in each lithography, thus arising such a problem that the size cannot be reduced so as to exceed that accuracy.
Thus, an object of this invention is to provide a semiconductor device capable of reducing the size of elements so as to exceed the mask alignment accuracy in lithography and a production method of the same.